Derivation of circuit block constraints

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C703S013000

Reexamination Certificate

active

07039883

ABSTRACT:
A design tool for generating circuit block constraints from a design environment. The design tool derives a fan-in cone function for each block input of a circuit block of a design. The fan-in cone function may include fan-in cone variables and block input variables. The fan-in cone functions are conjoined into a circuit block constraint functions. The circuit block constraint function is quantified to provide circuit block constraints. These constraints may be used in design verification (e.g. equivalence checking) and/or circuit analysis (e.g. timing rule generation).

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