Various methods and apparatuses to preserve a logic state...
Various methods and apparatuses to route multiple power...
VDHL/Verilog expertise and gate synthesis automation system
Vector interface to shared memory in simulating a circuit...
Vector interface to shared memory in simulating a circuit...
Vector Logic techniques for multilevel minimization
Vector logic techniques for multilevel minimization with...
Vectorless instantaneous current estimation
Vectorless instantaneous current estimation
Verification apparatus, design verification method, and...
Verification equipment of semiconductor integrated circuit,...
Verification of an extracted timing model file
Verification of design blocks and method of equivalence...
Verification of digital circuitry using range generators
Verification of embedded test structures in circuit designs
Verification of highly optimized synchronous pipelines via...
Verification of integrated circuit designs using buffer control
Verification of integrated circuit tests using test...
Verification of RRAM tiling netlist
Verification of sensitivity list integrity in a hardware...