Verification of an extracted timing model file

Details Verification of an extracted timing model file Verification of an extracted timing model file

2006-03-15

2009-08-18

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07577928

ABSTRACT:
A system, apparatus and method for generating and validating extracted timing model files, such as macro library files, are disclosed. A user interface or data template is provided to an engineer that allows for the population of data within particular fields related to timing characteristics of an IP block, cell or core. An extracted timing model file is generated and a validation procedure is performed. This validation procedure may include comparing the information with the file to a test bench have a plurality of test points. In particular, data provided by the engineer is checked against multiple criteria to ensure that this data is valid and/or falls within an appropriate value range constraints. After the validation procedure has completed, the engineer is provided a summary of the validation results.

REFERENCES:
patent: 2005/0198601 (2005-09-01), Kuang et al.

Affiliated with

Also associated with

Rating

Verification of an extracted timing model file does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Verification of an extracted timing model file, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Verification of an extracted timing model file will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4087938