Verification of embedded test structures in circuit designs

Details Verification of embedded test structures in circuit designs Verification of embedded test structures in circuit designs

2006-09-05

2006-09-05

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C702S117000, C703S020000

Reexamination Certificate

active

07103860

ABSTRACT:
A program product for use in generating test benches for verifying test structures embedded in a circuit, comprises a verification specification processor for parsing a verification specification containing test specifications for selected test structures and a test bench generator for each of one or more types of embedded test structures, each test bench generator being operable to process a test structure specification of a test structure of a corresponding test structure type and generate a test bench using data contained in said test specifications of said verification specification, data contained in said test structure specification and data contained in a test connection specification.

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