Memory debugger for system-on-a-chip designs
Memory efficient array transposition via multi pass tiling
Memory embedded semiconductor integrated circuit and a...
Memory generation and placement
Memory re-implementation for field programmable gate arrays
Memory tiling architecture
Memory timing model with back-annotating
Memory-saving method and apparatus for partitioning high fanout
Merging a hardware design language source file with a...
Merging multiplexers to reduce ROM area
Merging multiplexers to reduce ROM area
Merging of infrastructure within a development environment
Merging sub-resolution assist features of a...
Mesh plane generation and file storage
Metacores: design and optimization techniques
Metal interconnect structure for integrated circuits and a...
Metal interconnection read only memory cell
Metal layer assignment
Metal programmable clock distribution for integrated circuits
Metastability effects simulation for a circuit description