Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-22
2006-08-22
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C174S255000
Reexamination Certificate
active
07096451
ABSTRACT:
A method, system and program product implementing storage of a (power or ground) mesh plane file using a multiple line shape, possibly with the storage of lines also, to reduce file size. In addition, the invention implements an activate-substantial-portion-and-remove technique to generate mesh planes rather than the conventional additive approach, which improves the speed of designing the IC carriers. A resulting mesh plane design file may be as much as half the size of a file generated using the conventional line-by-line and storage approaches.
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Donaldson Alice L.
Frankel Jason L.
Ludwig John A.
Papae Kenneth A.
Perez-Acevedo Rafael
Cioffi James J.
Hoffman Warnick & D'Alessandro LLC
Kik Phallaka
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