Metacores: design and optimization techniques

Details Metacores: design and optimization techniques Metacores: design and optimization techniques

2006-03-21

2006-03-21

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C714S792000, C714S795000, C714S799000

Reexamination Certificate

active

07017126

ABSTRACT:
A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.

REFERENCES:
patent: 5796757 (1998-08-01), Czaja
patent: 5802116 (1998-09-01), Baker et al.
patent: 6948114 (2005-09-01), Potkonjak et al.
Metacores: Design and Optimization Techniques, Proceedings 2001 Design Automation Conference, pp. 585-590, Jun. 2001.
MetaCore: An Application-Specific Programmable DSP Development System, IEEE Transactions on VLSI Systems, pp. 173-183, Apr. 2000.
MetaCore: A Configurable & Instruction-Level Extensible DSP Core, Proceedings of the ASP-DAC 1998, pp. 325-326, Feb. 1998.
MetaCore: An Application-Specific DSP Development System, Proceedings of 1998 Design Automation Conference, pp. 800-803, Jun. 1998.
S. Swaminathan et al., A Dynamically Reconfigurable Adaptive Viterbi Decoder, Proceedings of the 2002 ACM/SIGDA tenth International Symposium on Field-programmable Gate Arrays, pp. 227-235, Feb. 2002.

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