Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1998-04-17
2000-11-28
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
716 7, 716 2, G06F 1750
Patent
active
06154874&
ABSTRACT:
An object of the present invention is to provide for a method and apparatus to partition high fanout nets into smaller subnets. Said method includes the steps of identifying elementary pairs of pins in the net, each such elementary pair defining a line; eliminating lines such that a planar graph is formed; eliminating further lines such that a spanning tree is formed, said spanning tree connecting each pin in the net; identifying basic elements, each basic element forming a portion of said spanning tree; and constructing a connected cover for said net, said connected cover comprising a plurality of said basic elements. Said elementary pairs are identified by determining for each pin in said net a relative x-coordinate and a relative y-coordinate, constructing for each pin a combined binary coordinate as a function of the pin's relative x-coordinate and relative y-coordinate, ordering the pins in accordance with their respective combined binary coordinates, iteratively combining the pins until one pin remains, and iteratively expanding the pins.
REFERENCES:
patent: 5491641 (1996-02-01), Scepanovic et al.
patent: 5495419 (1996-02-01), Rostoker et al.
patent: 5568322 (1996-10-01), Azami et al.
patent: 5568636 (1996-10-01), Koford
patent: 5578840 (1996-11-01), Scepanovic et al.
patent: 5615128 (1997-03-01), Scepanovic et al.
patent: 5636125 (1997-06-01), Rostoker et al.
patent: 5638293 (1997-06-01), Scepanovic et al.
patent: 5661663 (1997-08-01), Scepanovic et al.
patent: 5682321 (1997-10-01), Ding et al.
patent: 5682322 (1997-10-01), Boyle et al.
patent: 5712793 (1998-01-01), Scepanovic et al.
patent: 5742510 (1998-04-01), Rostoker et al.
patent: 5745363 (1998-04-01), Rostoker et al.
patent: 5808899 (1998-09-01), Scepanovic et al.
patent: 5818729 (1998-10-01), Wang et al.
patent: 5930500 (1999-07-01), Scepanovic et al.
patent: 6058254 (2000-05-01), Scepanovic et al.
patent: 6067409 (2000-03-01), Scepanovic et al.
patent: 6068662 (2000-03-01), Scepanovic et al.
patent: 6075933 (2000-06-01), Pavisic et al.
Wu et al. ("Partitioning algorithms for layout synthesis from register-transfer netlists", Digest of Technical Papers, 1990 IEEE International Conference on Computer-Aided Design, ICCAD-90, pp. 144-147, Nov. 11, 1990).
Yan ("Connection-oriented net model and fuzzy clustering techniques for K-way circuit partitioning", Proceedings of 1995 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1995, ICCD '95, pp. 236-241, Oct. 2, 1995).
Liu et al. ("Network-flow-based multiway partitioning with area and pin constraints", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 17, No. 1, Jan. 1998, pp. 50-59).
Liu et al. ("A replication cut for two-way partitioning", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, No. 5, May 1995, pp. 623-630).
Harvatis et al. ("Pin assignment for high-performance MCM systems", 1996 IEEE International Symposium on Circuits and Systems, ISCAS '96, Connecting the World, vol. 4, pp. 771-774, May 12, 1996).
Yang et al. ("Circuit clustering for delay minimization under area and pin constraints", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, No. 9, Sep. 1997, pp. 976-986).
Honghua et al. ("Circuit clustering for delay minimization under area and pin constraints", Proceedings of European Design and Test Conference, 1995, ED&TC 1995, Mar. 6, 1995, pp. 65-70).
Andreev Alexander E.
Raspopovic Pedja
Scepanovic Ranko
Kik Phallaka
Lintz Paul R.
LSI Logic Corporation
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