Bi-directional silicon controlled rectifier for...
Bi-directional silicon controlled rectifier structure with...
Bi-directional transient voltage suppression device and...
Bi-directional unipolar semiconductor light source
Bi-directional, fast-timing, charge coupled device
Bi-layer etch stop process for defect reduction and via...
Bi-layer nFET embedded stressor element and integration to...
Bi-level digit line architecture for high density DRAMs
Bi-level digit line architecture for high density DRAMS
Bi-level digit line architecture for high density drams
Bi-level digit line architecture for high density DRAMS
Bi-level injection molded leadframe
Bi-level microelectronic device package with an integral window
Bi-level multilayered microelectronic device package with an...
Bi-planar multi-chip module
Bias plasma deposition for selective low dielectric insulation
Bias-adjusted giant magnetoresistive (GMR) devices for...
Bias-independent capacitor based on superposition of...
Biasable isolation regions using epitaxially grown silicon...
Biased, triple-well fully depleted SOI structure