Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With window means
Reexamination Certificate
2002-02-25
2004-01-06
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With window means
C257S778000, C257S779000, C257S780000, C257S737000, C257S738000, C257S693000, C257S704000, C257S431000, C257S432000, C257S433000, C257S434000
Reexamination Certificate
active
06674159
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the field of microelectronics, and more specifically to housing of microelectronic devices in a package having an integral window.
Many different types of microelectronic devices require a transparent window to provide optical, UV, and IR access; as well as protection from the environment. Examples of light-sensitive semiconductor devices include charge-coupled devices (CCD), photosensitive cells (photocells), solid-state imaging devices, and UV-light sensitive Erasable Programmable Read-Only Memory (EPROM) chips. All of these devices use microelectronic devices that are sensitive to light over a range of wavelengths, including ultraviolet, infrared, and visible light. Other types of semiconductor photonic devices emit photons, such as laser diodes, light emitting diodes (LED's), and Vertical Cavity Surface-Emitting Laser (VCSELS), which also need to pass light through a protective window.
Microelectromechanical systems (MEMS) and Integrated MEMS (IMEMS) devices (e.g. MEMS devices combined with Integrated Circuit (IC) devices) can also require a window for optical access. Examples of MEMS devices include airbag accelerometers, microengines, microlocks, optical switches, tiltable mirrors, adaptive mirror membranes, micro reflectors (retro-reflectors), micro reflectors with micro-shutters, miniature gyroscopes, sensors, and actuators. All of these MEMS devices use active mechanical and/or optical elements. Some examples of active MEMS structures include gears, hinges, levers, slides, tilting mirrors, optical sensors. These active structures must be free to move, rotate, or interact with light or other photonic radiation. Optical access through a window is required for MEMS devices that have mirrors and optical elements. Optical access to non-optically active MEMS devices can also be required for permitting visual inspection, observation, and/or performance characterization of the moving elements.
Additionally, radiation detectors that detect alpha, beta, and gamma radiation, use opaque “windows” of varying thickness and materials that transmit, block, or filter these energetic particles. These devices also have a need for windows that transmit or filter radiation to and from the active device, while at the same time providing physical.
There is a continuing need in the semiconductor fabrication industry to reduce costs and improve reliability by reducing the number of fabrication steps, while increasing the density of components. One approach is to shrink the size of packaging. Another is to combine as many steps into one by integrating operations. A good example is the use of cofired multilayer ceramic packages. Unfortunately, adding windows to these packages typically increases the complexity and costs.
Hermetically sealed packages are used to satisfy more demanding environmental requirements, such as for military and space applications. The schematic shown in
FIG. 1
illustrates a conventional ceramic package for a MEMS device, a CCD chip, or other optically active microelectronic device. The device or chip is die-attached face-up to a ceramic package and then wirebonded to interconnect inside of the package. Metallized circuit traces carry the electrical signal through the ceramic package to electrical leads mounted outside. A glass window is attached as the last step with a frit glass or solder seal. Examples of conventional ceramic packages include Ceramic Dual In-Line Package (CERDIP), EPROM and Ceramic Flatpack designs.
Although stronger, ceramic packages are typically heavier, bulkier, and more expensive to fabricate than plastic molded packages. Problems with using wirebonding include the fragility of very thin wires; wire sweep detachment and breakage during transfer molding; additional space required to accommodate the arched wire shape and toolpath motion of the wirebond toolhead; and the constraint that the window (or cover lid) be attached after the wirebonding step. Also, attachment of the window as the last step can limit the temperature of bonding the window to the package. Finally, vapors emitted by polymer-based adhesives used to fasten the window can be deposited on released MEMS structures, causing problems with stiction.
FIG. 2
illustrates schematically a conventional molded plastic (e.g. encapsulated) microelectronic package. The chip is attached to a lead frame, and a polymer dam (e.g., epoxy) prevents the plastic encapsulant from flowing onto the light-sensitive active area of the chip during transfer molding. The window is attached with a polymer-based adhesive (e.g., an epoxy-based adhesive, a polyimide-based adhesive, a silicone-based adhesive, an acrylic-based adhesive, or a urethane-based adhesive). This type of package is not hermetic against moisture intrusion, cannot be used for high temperature operation, and the use of plastics and adhesives can interfere with the operation of MEMS structures.
Flip-chip mounting (i.e., interconnecting) of semiconductor chips is an attractive alternative to wirebonding. In flip-chip mounting,.the chip (i.e., device) is mounted facedown and then electrically interconnected to circuit traces on the substrate via “bumps” (e.g., balls, bumps, pads). The bumps can be made of gold, aluminum, copper, or solder, and can be joined using reflow soldering, plasma-assisted dry soldering, thermocompression bonding, ultrasonic bonding, or thermosonic bonding. All of the flip-chip interconnections are made simultaneously. Excess spreading of a molten solder ball/bump is prevented by the use of specially designed bonding pads. Flip-chip mounting has been successfully used in fabricating Multi-Chip Modules (MCM's), Chip-on-Board, Silicon-on-Silicon, and Ball Grid Array packaging designs.
Flip-chip mounting has many benefits over traditional wirebonding, including increased packaging density, lower lead inductance, shorter circuit traces, thinner package height, no thin wires to break, and simultaneous mechanical die-attach and electrical circuit interconnection. Another advantage is that the chips are naturally self-aligning due to favorable surface tension when using molten solder balls/bumps. It is also possible to replace the metallic solder bumps with bumps, or dollops, of an electrically-conductive polymer or epoxy (e.g. silver-filled epoxy). Flip-chip mounting avoids potential problems associated with ultrasonic bonding techniques that can impart stressful vibrations to a fragile (e.g. released) MEMS structure. A polymer underfll can be optionally applied to the rows of interconnected bumps to provide additional mechanical strength, and to improve reliability.
Despite the well-known advantages of flip-chip mounting, this technique has not been widely practiced for packaging of MEMS devices, Integrated MEMS (IMEMS), or CCD chips because attaching the chip facedown to a solid, opaque substrate prevents optical access to the optically active or photonically interactive surface.
The use of multilayered materials in electronic device packaging has a number of advantages. Each individual layer (i.e., ply or sheet) of dielectric material can be printed with electrically conducting metallic traces, and the traces on different levels can be interconnected by conductive paths (i.e., vias) that cut across the laminated layers. Each layer can be individually “personalized” by cutting unique patterns of cutouts in the layer, that, when stacked with other “personalized” layer, can create a complex internal three-dimensional structure of cavities, recesses, etc. Multilayered materials include laminated polymer-based printed circuit board, materials, and laminated ceramic-glass composite materials.
The cost of fabricating ceramic packages can be reduced by using cofired ceramic multilayered packages. Multilayered packages are presently used in many product categories, including leadless chip carriers, pin-grid arrays (PGA's), side-brazed dual-in-line packages (DIP's), flatpacks, and leaded chip carriers. Depending on the application, 5-40 layers
Peterson Kenneth A.
Watson Robert D.
Sandia National Laboratories
Talbott David L.
Thai Luan
Watson Robert D.
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