Partially depleted SOI field effect transistor having a...
Partially gated FINFET with gate dielectric on only one...
Partially pinned photodiode for solid state image sensors
Partially recessed DRAM cell structure
Passivated tiered gate structure transistor
Passivation film on a semiconductor wafer
Passivation of power semiconductor device
Passivation of sidewalls of a word line stack
Passivation structure for ferroelectric thin-film devices
Passive element circuit
Pattern form of an active region of a MOS type semiconductor dev
Patterned backside stress engineering for transistor...
Patterned SOI by oxygen implantation and annealing
Patterned SOI regions in semiconductor chips
Pb/Bi-containing high-dielectric constant oxides using a non-Pb/
Pb/Bi-containing high-dielectric constant oxides using a non-Pb/
Pedestal collar structure for higher charge retention time...
Performance lateral double-diffused MOS transistor
Performing passive voltage contrast on a silicon on...
Peripheral circuits including high voltage transistors with LDD