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Chip scale package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate

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Chip scale package for power devices and method for making...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

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Chip scale package of semiconductor

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
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Chip scale package using large ductile solder balls

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

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Chip scale package with heat dissipating part

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
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Chip scale package with micro antenna and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead
Reexamination Certificate

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Chip scale pin array

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate

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Chip scale surface mounted device and process of manufacture

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate

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Chip select method through double bonding

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
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Chip size image sensor camera module

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

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Chip size integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent

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Chip size package and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent

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Chip size package having concave pattern in the bump pad...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate

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Chip size package semiconductor device and method of forming...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate

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Chip size semiconductor packages with stacked dies

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip size stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip sized package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Patent

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Chip sized semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – By pressure alone
Patent

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Chip stack package and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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Chip stack package and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate

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