Chip scale package with heat dissipating part

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S796000, C257S684000, C257S666000, C257S696000, C257S698000, C257S737000, C257S738000, C257S784000, C257S786000, C257S787000, C257S712000, C257S675000, C257S676000, C257S673000

Reexamination Certificate

active

06876087

ABSTRACT:
In a chip scale package, a chip is mounted in a cavity formed in a leadframe. The leadframe includes a plurality of leads that radiate from a heat dissipating part located in the cavity. Each lead extends from a thinner portion of inner lead in the cavity to a thicker portion of outer lead outside the cavity. The chip includes a plurality of bonding pads on which is respectively formed a layer of connecting material. The chip is attached on the heat dissipating material, and via the layer of connecting material, is electrically connected to the inner leads by thermal pressing. Via molding, the chip is encapsulated in the leadframe. The achieved package has a dimensional size that is approximately equal to that of the leadframe with an improved thermal dissipation.

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patent: 10-50921 (1998-02-01), None

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