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Selected: G

Gate array arrangement in complementary metal-oxide-semiconducto

Static information storage and retrieval – Systems using particular element – Flip-flop
Patent

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Gate array chip

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Gate array device

Static information storage and retrieval – Format or disposition of elements
Patent

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Gate array for accelerating access to a random access memory

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Patent

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Gate array integrated circuit device and method thereof for prov

Static information storage and retrieval – Format or disposition of elements
Patent

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Gate array LSI

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Gate array macro cell

Static information storage and retrieval – Systems using particular element – Flip-flop
Patent

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Gate array type semiconductor integrated circuit device

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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Gate array with bidirectional symmetry

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Gate controlled floating well vertical MOSFET

Static information storage and retrieval – Systems using particular element – Capacitors
Reexamination Certificate

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Gate edge aligned EEPROM transistor

Static information storage and retrieval – Floating gate – Particular connection
Patent

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Gate EEPROM cell

Static information storage and retrieval – Floating gate – Particular biasing
Patent

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Gate electrode for MNOS semiconductor memory device

Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent

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Gate induced drain leakage current reduction by voltage...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Gate induced drain leakage current reduction by voltage...

Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate

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Gate stress test of a MOS memory

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Gate voltage reduction in a memory read

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Gate voltage regulation system for a non-volatile memory...

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Gate voltage testkey for isolation transistor

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Gate voltage testkey for isolation transistor

Static information storage and retrieval – Format or disposition of elements
Reexamination Certificate

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