Gate EEPROM cell

Details Gate EEPROM cell Gate EEPROM cell

1986-05-28

1993-05-04

Dixon, Joseph L.

Static information storage and retrieval

Floating gate

Particular biasing

36518909, 365218, 257320, 257325, B11C 1604

Patent

active

052087727

ABSTRACT:
A non-volatile memory cell uses two different areas for electron injection, allowing direct overwriting of previously stored data without an intervening erase cycle. A floating gate FET has dual programming gates disposed on its floating gate. Each programming gate includes a layer of dual electron injector structure (DEIS) and a polysilicon electrode. When writing a "0", one of the programming gates removes charge from the floating gate. When writing a "1", the other programming gate injects charge into the floating gate. The above charge transfer does not take place if the previously stored logic gate and the logic state to be written in are identical.

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H. N. Kotecha et al, IEEE International Solid-State Circuits Conf., Digest of Technical Papers, Feb. 18, 1981, pp. 38, 39, "A Dual-Gate Floating-Gate FET Device".
Young, "Storage Cell for Electronically Alterable Read-Only Storage Arrays Using Dual Electron Injector Structure Charge Injectors," IBM Technical Technical Disclosure Bulletin, vol. 24, No. 3, Aug. 1981, pp. 1541-1542.
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