Gate voltage regulation system for a non-volatile memory...

Details Gate voltage regulation system for a non-volatile memory... Gate voltage regulation system for a non-volatile memory...

2006-08-01

2006-08-01

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185030, C365S185210, C365S189090

Reexamination Certificate

active

07085163

ABSTRACT:
A plurality of non volatile memory cells, for example of the flash type, with low circuit area occupation, are organized in cell matrices with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content. Each of the cells has a gate terminal biased in the programming phase with a predetermined voltage value through operation of charge pump voltage regulators. A first and a second regulation stage, which are structurally independent, are responsible for the programming and soft programming phase respectively. The first stage generates a supply voltage for the second stage.

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European Search Report, EP 03 42 5134, dated Jul. 28, 2003.

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