FIFO configuration cell

Film cryotron

First-in-first-out register implemented with single rank storage

Five device merged transistor RAM cell

Five transistor CMOS memory cell including diodes

Five transistor memory cell with shared power line

Five transistor SRAM cell

Five-transistor SRAM cell

Five-transistor static memory cell implemental in CMOS/bulk

Flash EEPROM memory systems having multistate storage cells

Flash memory cell structure

Flip-flop circuit with controllable copying between slave and sc

Flip-flop detector array for minimum geometry semiconductor memo

Floating body cell memory and reading and writing circuit...

Floating gate device with graphite floating gate

Floating source line architecture for non-volatile memory

Floating-body DRAM with two-phase write

Floating-body dynamic random access memory with purge line

Floating-body dynamic random access memory with purge line

Fluxon injection into annular Josephson junctions