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Reducing DQ pin capacitance in a memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Reducing leakage current in memory device using bitline...

Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate

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Reducing level shifter standby power consumption

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Reducing level shifter standby power consumption

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Reducing memory failures in integrated circuits

Static information storage and retrieval – Read/write circuit – Bad bit
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Reducing power consumption in computer memory

Static information storage and retrieval – Read/write circuit – Data refresh
Patent

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Reducing power consumption in integrated circuits

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate

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Reduction of data dependent power supply noise when sensing...

Static information storage and retrieval – Read/write circuit – Including signal comparison
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Reduction of data dependent power supply noise when sensing...

Static information storage and retrieval – Read/write circuit – Differential sensing
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Reduction of fusible links and associated circuitry on...

Static information storage and retrieval – Read/write circuit – Bad bit
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Reduction of noise in memory integrated circuits with...

Static information storage and retrieval – Read/write circuit – Differential sensing
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Reduction of standby current

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Reduction of voltage stress across a gate oxide and across a...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate

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Redundancy analysis for embedded memories with built-in self tes

Static information storage and retrieval – Read/write circuit – Testing
Patent

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Redundancy antifuse bank for a memory device

Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate

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Redundancy architecture

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Redundancy architecture and method for block write access cycles

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Redundancy architecture for an integrated circuit memory

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Redundancy architecture for an integrated circuit memory

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Redundancy architecture for repairing semiconductor memories

Static information storage and retrieval – Read/write circuit – Bad bit
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