Reducing power consumption in integrated circuits

Details Reducing power consumption in integrated circuits Reducing power consumption in integrated circuits

2007-12-11

2007-12-11

Pham, Ly Duy (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

C365S154000, C365S189011, C365S230030, C365S236000

Reexamination Certificate

active

11134450

ABSTRACT:
A method and apparatus for reducing power consumption in integrated memory devices is provided. Banks of memory cells may be individually put into “sleep” mode via respective “sleep” transistors.

REFERENCES:
patent: 6515513 (2003-02-01), Ye et al.
patent: 2001/0013806 (2001-08-01), Notani
patent: 2003/0160634 (2003-08-01), Mushiga et al.
patent: 2003/0184364 (2003-10-01), Miyagi
patent: 2004/0080340 (2004-04-01), Hidaka
patent: 2006/0232321 (2006-10-01), Chuang et al.

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