Multi-bit test circuit of semiconductor memory device

Multi-bit testing circuit for semiconductor memory device

Multi-bit-per-cell and analog/multi-level non-volatile memories

Multi-block erase and verification circuit in a nonvolatile semi

Multi-boot configuration of programmable devices

Multi-chip package for a flash memory

Multi-chip package reducing power-up peak current

Multi-chip semiconductor device providing enhanced...

Multi-chip semiconductor packages and methods of operating...

Multi-FIFO integrated circuit devices that support...

Multi-function serial I/O circuit

Multi-generator, partial array Vt tracking system to improve...

Multi-level dynamic memory device

Multi-level memory cell with increased read-out margin

Multi-level, low voltage swing sensing scheme for high speed...

Multi-phase duty-cycle corrected clock signal generator and...

Multi-port DRAM cell and memory system using same

Multi-port dynamic memory structures

Multi-port memory architecture

Multi-port memory cells and memory with parallel data initializa