Bank erasable, flash-EPROM memory

Details Bank erasable, flash-EPROM memory Bank erasable, flash-EPROM memory

1991-11-15

1994-02-22

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Erase

36523003, 365900, 257320, 257322, G11C 700

Patent

active

052894231

ABSTRACT:
Each common source region of the cells of a row of a FLASH-EPROM matrix may be segmented and each segment is individually connected to a secondary source line patterned in a second level metal layer by a plurality of contacts between each common source region and patterned portions of a first level metal and through as many interconnection vias between the latter patterned portions of the first level of metal and the relative secondary source line patterned in the second metal layer. The secondary source lines are brought out of the matrix orthogonally to the bit lines and may be connected to a dedicated selection circuitry, thus permitting the erasing by groups or banks of cells of the FLASH-EPROM memory.

REFERENCES:
patent: 4853895 (1989-08-01), Mitchell et al.
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5101250 (1992-03-01), Arima et al.
patent: 5136541 (1992-08-01), Arakawa
patent: 5155705 (1992-10-01), Goto et al.

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