Back bias voltage generating circuit

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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Details

36518911, G11C 700

Patent

active

057151997

ABSTRACT:
A back bias voltage generating circuit of a semiconductor memory device which is capable of reducing noise generated during the operation of a circuit affecting the operation of a sense amplifier. The back bias voltage generating circuit includes: a back bias voltage oscillator which outputs a pulse signal having a constant period; a back bias voltage oscillator phase shifter which phase-shifts the pulse signal from the back bias voltage oscillator and outputs a plurality of phase-shifted pulse signals; a plurality of back bias voltage pump drivers which are driven by the plurality of phase-shifted pulse signals outputted from the back bias voltage oscillator phase shifter; a plurality of back bias voltage pumpers which generate a back bias voltage by control signals generated from the plurality of back bias voltage pump drivers; and a back bias voltage enable controller which inputs the back bias voltage and a sense amplifier enable signal for controlling the back bias voltage oscillator, to halt the back bias voltage pumpers, when a sense amplifier operates, but applies a signal detecting the back bias voltage to the back bias voltage oscillator, when the sense amplifier does not operate.

REFERENCES:
patent: 4964082 (1990-10-01), Sato et al.
patent: 5434820 (1995-07-01), Kim
patent: 5446697 (1995-08-01), Yoo et al.
patent: 5499217 (1996-03-01), Pascucci et al.
patent: 5563831 (1996-10-01), Ting
patent: 5587956 (1996-12-01), Tanida

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