Bank based self refresh control apparatus in semiconductor...

Details Bank based self refresh control apparatus in semiconductor... Bank based self refresh control apparatus in semiconductor...

2006-08-08

2006-08-08

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230030, C365S195000, C365S063000, C365S230080

Reexamination Certificate

active

07088635

ABSTRACT:
A partial array self refresh (PASR) control apparatus for use in a semiconductor memory device having a plurality of banks includes: a bank deselection unit having a plurality of bank deselection signal output units for receiving a plurality of PASR code signals, wherein input terminal lines of each bank deselection signal output unit and signal lines of the plurality of PASR code signals are crossed each other and are selectively coupled each other.

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patent: 6819617 (2004-11-01), Hwang et al.
patent: 6834022 (2004-12-01), Derner et al.
patent: 2005/0041506 (2005-02-01), Hwang et al.
patent: 2002-334576 (2002-11-01), None
patent: 1020020068749 (2002-08-01), None
patent: 1020040040579 (2004-05-01), None

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