Semiconductor memory device provided with a write column...

Semiconductor memory device that can access two regions...

Semiconductor memory device using open data line arrangement

Semiconductor memory device using open data line arrangement

Semiconductor memory device using tapered arrangement of...

Semiconductor memory device with a countermeasure to a...

Semiconductor memory device with a hierarchical word line...

Semiconductor memory device with an increased band width

Semiconductor memory device with chip layout for enabling...

Semiconductor memory device with column gate and equalizer...

Semiconductor memory device with data retention...

Semiconductor memory device with efficient layout

Semiconductor memory device with memory cells arranged in...

Semiconductor memory device with memory test circuit

Semiconductor memory device with MOS transistors each having...

Semiconductor memory device with MOS transistors each having...

Semiconductor memory device with MOS transistors each having...

Semiconductor memory device with readily changeable memory...

Semiconductor memory device with resistive power supply connecti

Semiconductor memory device with two layers of bit lines