Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2005-01-18
2005-01-18
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C365S069000, C257S776000
Reexamination Certificate
active
06845028
ABSTRACT:
When a phase shift method is used as lithography where sense amplifiers are alternately placed in a one intersecting-point memory capable of implementing a reduction in the area of a DRAM, it was difficult to layout data lines in a boundary region between sense amplifiers and each memory array. Therefore, there is provided a semiconductor device according to the present invention. In the semiconductor device, two data lines continuous within the sub memory arrays or interposed therebetween are connected to the adjacent sense amplifiers as a system for drawing data lines from sub memory arrays (SMA) to sense amplifiers (SA) when the sense amplifiers are alternately placed. Namely, the number of data lines interposed between data lines respectively connected to two adjacent sense amplifiers is set to even numbers (0, 2, 4, . . . ). Owing to the above configuration, a break and a short circuit in a portion where a sense amplifier block and a sub memory array are connected, can be avoided, and a connection layout is facilitated.
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Auduong Gene N.
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
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