Multiple level cell memory device with single bit per cell,...
Multiple level programming in a non-volatile memory device
Multiple programming of spare memory region for nonvolatile...
Multiple select gate architecture
Multiple select gate architecture
Multiple select gate architecture with select gates of...
Multiple select gate architecture with select gates of...
Multiple select gates with non-volatile memory cells
Multiple select gates with non-volatile memory cells
Multiple time programmable (MTP) PMOS floating gate-based...
Multiple time programmable (MTP) PMOS floating gate-based...
Multiple use memory chip
NAND architecture memory devices and operation
NAND architecture memory devices and operation
NAND array structure and method with buried layer
NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR...
NAND flash memory
NAND flash memory
NAND flash memory
NAND flash memory