Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2009-05-07
2011-12-06
Tran, Michael (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185240
Reexamination Certificate
active
08072811
ABSTRACT:
A NOR flash nonvolatile memory device provides the memory cell size and a low current program process of a NAND flash nonvolatile memory device and the fast, asynchronous random access of a NOR flash nonvolatile memory device. The NOR flash nonvolatile memory device has an array of NOR flash nonvolatile memory circuits that includes charge retaining transistors serially connected in a NAND string such that at least one of the charge retaining transistors functions as a select gate transistor to prevent leakage current through the charge retaining transistors when the charge retaining transistors is not selected for reading. The topmost charge retaining transistor's drain is connected to a bit line parallel to the charge retaining transistors and the bottommost charge retaining transistor's source is connected to a source line and is parallel to the bit line. The charge retaining transistors are programmed and erased with a Fowler-Nordheim tunneling process.
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Hsu Fu-Chang
Lee Peter Wung
Tsao Hsing-Ya
Ackerman Stephen B.
Aplus Flash Technology, Inc,
Knowles Billy
Saile Ackerman LLC
Tran Michael
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