Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2009-03-13
2011-12-20
Hidalgo, Fernando (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185240, C365S185220, C365S185290
Reexamination Certificate
active
08081513
ABSTRACT:
A NAND flash memory has a control circuit. The control circuit applies a writing voltage between a control gate and a well by applying a first voltage to the well and a positive second voltage higher than the first voltage to the control gate during the writing operation, and then the control circuit applies a detrapping voltage between the control gate and the well by applying a third voltage to the control gate and a positive fourth voltage higher than the third voltage to the well before the verification reading operation.
REFERENCES:
patent: 5930173 (1999-07-01), Sekiguchi
patent: 6614693 (2003-09-01), Lee et al.
patent: 6856552 (2005-02-01), Takahashi
patent: 2007/0036001 (2007-02-01), Kanda et al.
patent: 2007/0058433 (2007-03-01), Takeuchi et al.
patent: 2007/0183208 (2007-08-01), Tanaka et al.
patent: 2003-173690 (2003-06-01), None
Koichi Fukuda, et al., “Random Telegraph Noise in Flash Memories—Model and Technology Scaling”, IEDM Tech. Dig., 2007, pp. 169-172.
U.S. Appl. No. 12/727,817, filed Mar. 19, 2010, Fukuda, et al.
Hidalgo Fernando
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
LandOfFree
NAND flash memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with NAND flash memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and NAND flash memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4261822