Multiple select gates with non-volatile memory cells

Details Multiple select gates with non-volatile memory cells Multiple select gates with non-volatile memory cells

2011-08-09

2011-08-09

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C257S315000

Reexamination Certificate

active

07995391

ABSTRACT:
Multiple select gates in association with non-volatile memory cells are described. Various embodiments include multiple select gate structure, process, and operation and their applicability for memory devices, modules, and systems. In one embodiment a memory array is described. The memory array includes a number of select gates coupled in series to a number of non-volatile memory cells. A first select gate includes a control gate and a floating gate electrically connected together and a second select gate includes a control gate and a floating gate which are electrically separated by a dielectric layer.

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Applicant's Amendment and Response dated Mar. 18, 2008 to Examiner's Office Action dated Feb. 25, 2008 (24 pgs.).

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