Multiple select gate architecture with select gates of...

Details Multiple select gate architecture with select gates of... Multiple select gate architecture with select gates of...

2006-04-12

2008-10-21

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185050

Reexamination Certificate

active

07440321

ABSTRACT:
A portion of a memory array has a string of two or more non-volatile memory cells, a first select gate coupled in series with one non-volatile memory cell of the string of two or more non-volatile memory cells, and a second select gate coupled in series with the first select gate. A length of the second select gate is greater than a length of the first select gate.

REFERENCES:
patent: 7120059 (2006-10-01), Yeh
patent: 2005/0088890 (2005-04-01), Matsunaga et al.
patent: 2008/0101126 (2008-05-01), Hemink et al.

Affiliated with

Also associated with

Rating

Multiple select gate architecture with select gates of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiple select gate architecture with select gates of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple select gate architecture with select gates of... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4015531