Switching circuit having an output voltage varying between a ref

Symmetrical non-volatile memory array architecture without...

Symmetrical program and erase scheme to improve erase time...

Synchronous up/down address generator for burst mode read

Synchronous up/down address generator for burst mode read

System and method for avoiding offset in and reducing the...

System and method for bit-line control

System and method for controlling logical value and...

System and method for controlling source current and voltage dur

System and method for controlling voltage and current characteri

System and method for detecting flash memory threshold voltages

System and method for enhancing erase performance in a CMOS...

System and method for erasing a memory cell

System and method for erasing non-volatile memory cells

System and method for matching resistance in a non-volatile...

System and method for over erase reduction of nitride read...

System and method for over erase reduction of nitride read...

System and method for preventing read margin degradation for...

System and method for programming cells in non-volatile...

System and method for programming non-volatile memory