System and method for erasing a memory cell

Details System and method for erasing a memory cell System and method for erasing a memory cell

2007-01-23

2007-01-23

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185270, C365S185030

Reexamination Certificate

active

11062641

ABSTRACT:
A method erases a memory cell of a semiconductor device that includes a group of memory cells. Each memory cell includes a group of storage regions. The method includes determining that each storage region of the group of storage regions of a first memory cell is to be erased and erasing the group of storage regions of the first memory cell via a single hot hole injection process.

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Suk-Kang Sung et al., “Fabrication and Program/Erase Characteristics of 30-nm SONOS Nonvolatile Memory Devices,”IEEE Transactions on Nanotechnology, vol. 2, No. 4, Dec. 2003, pp. 258-264.

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