System and method for matching resistance in a non-volatile...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185110, C365S210130

Reexamination Certificate

active

11193924

ABSTRACT:
A method and system for approximating resistance in a non-volatile memory has a memory matrix. The memory matrix has a plurality of memory cells and a plurality of memory source lines that are coupled to the plurality of memory cells. A reference matrix is coupled to the memory matrix and has a reference cell. A logic generator is coupled to the reference matrix and is configured to generate an approximation, at the reference cell, of a resistance between a selected one of the plurality of memory cells and at least one of the plurality of memory source lines.

REFERENCES:
patent: 5717632 (1998-02-01), Richart et al.
patent: 5748546 (1998-05-01), Bauer et al.
patent: 5774395 (1998-06-01), Richart et al.
patent: 6411549 (2002-06-01), Pathak et al.
patent: 6809976 (2004-10-01), Ooishi
patent: 6975540 (2005-12-01), Kato
patent: 2004/0057291 (2004-03-01), Conte et al.

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