System and method for programming non-volatile memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185050, C365S226000

Reexamination Certificate

active

06865113

ABSTRACT:
Circuitry for programming a non-volatile memory of an integrated circuit is disclosed. The circuitry requires only three pins: a power pin, a ground pin, and a data pin. Programming mode is initiated by coincidentally applying high voltages at the power pin and the data pin. The memory cells may be programmed individually in sequence, or all at once. A clock signal for selecting the memory cells is obtained through serial high voltage pulses applied to the power pin. The clock signal increments a state machine, which in turn causes one or more of the memory cells to be selected. Binary data is provided to the data pin, is stored, and is then provided to the memory cells. A high voltage pulse subsequently received at the data pin is passed to the memory cells, and causes the stored data to be programmed into the selected memory cell(s).

REFERENCES:
patent: 5444664 (1995-08-01), Kuroda et al.
patent: 6449197 (2002-09-01), Hiraki et al.
patent: 6584013 (2003-06-01), Senda et al.

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