Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-11-27
2007-11-27
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185210, C365S185220
Reexamination Certificate
active
11126473
ABSTRACT:
A system and method for avoiding offset in and reducing the footprint of a non-volatile memory that has a plurality of memory bank circuits. Each memory bank circuit has memory cells coupled to sense amplifiers, row and column decoders coupled to the memory cells, and bias circuits coupled to the sense amplifiers. The system includes a reference cell matrix coupled to each of the plurality of memory bank circuits. The reference cell matrix is configured to provide reference cell current for each of the plurality of memory bank circuits.
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Figini Luca
Frulio Massimiliano
Reggiori Riccardo Riva
Sacco Andrea
Atmel Corporation
Bernstein Allison P
Nguyen Van Thu
Sawyer Law Group LLP
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