Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2000-02-15
2001-03-20
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185200
Reexamination Certificate
active
06205057
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a flash memory array, and more particularly, to a system and a method for detecting one or more threshold voltage ranges of a flash memory cell.
BACKGROUND OF THE INVENTION
Electronic memories are used to store code and data on a temporary (volatile) or a permanent (non-volatile) basis. Flash memory is one type of non-volatile memory that can store and erase information in circuit. Unlike some non-volatile memory that is erased and programmed in bytes, flash memory is erased in blocks. Flash memory is versatile as some flash memory devices can interface five volt, three volt, and two volt system buses. Moreover, some flash memory devices can perform reading and programming operations simultaneously.
Flash memory can be interfaced with many circuits and can include one or more data bit densities per memory cell. Each memory cell has more than one threshold voltage range that is divided into specific bit sequences. In a one bit density cell, for example, a low voltage threshold range can be assigned a logic low state and a high voltage threshold range can be assigned a logic high state.
As memory technology develops, flash memory cells are becoming denser and assigning more bit sequences to threshold voltage ranges. With growing demand for dense memories, there is an expectation of reliably and high access speeds. Applications such as wireless technology, for example, cannot afford the expense of delayed data retrieval and code execution that can interrupt communications. While some management software tracks memory blocks reliably and efficiently, the software cannot sense the threshold voltage ranges of a flash memory cell. Flash memory sensing circuits can be complicated and can require expansive circuit space which is not always available in high performance micro-technologies. The present invention is directed to overcome these drawbacks of the prior art.
REFERENCES:
patent: 5600594 (1997-02-01), Paddan et al.
patent: 5684739 (1997-11-01), Takeuchi
patent: 5841719 (1998-11-01), Hirata
Advanced Micro Devices
Brinks Hofer Gilson & Lione
Nguyen Tan T.
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