System and method for over erase reduction of nitride read...

Details System and method for over erase reduction of nitride read... System and method for over erase reduction of nitride read...

2006-02-21

2006-02-21

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185220

Reexamination Certificate

active

07002850

ABSTRACT:
A nitride read only memory (NROM) erase system is disclosed. The NROM erase system comprises at least one memory sector, N sense amplifiers, and N buffers. The memory sector is segmented into N erase retry units according to the number of the sense amplifiers. One buffer corresponds with one erase retry unit and one sense amplifier. The N buffers are used to indicate whether their corresponding erase retry units are erased after an erase process of an erase operation. One of the buffers will be set if its corresponding erase retry unit is not erased. In this case, a subsequent erase process will begin to erase the un-erased erase retry unit. The erase retry units that are erased in a previous erase process will not be affected by the subsequent erase process. A method for using the disclosed NROM erase system is also described.

REFERENCES:
patent: 5598368 (1997-01-01), Takahashi et al.
patent: 6172915 (2001-01-01), Tang et al.
patent: 6407944 (2002-06-01), Choi et al.

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