Selectable memory word line deactivation
Selective adjustment of voltage controlled oscillator gain...
Selective dynamic RAM address generator with provision for autom
Selective edge phase mixing
Selective edge phase mixing
Selectively enabled memory array access signals
Self adjusting sense amplifier clock delay circuit
Self latching input buffer
Self reset clock buffer in memory devices
Self timed bit and read/write pulse stretchers
Self-addressed subarray precharge
Self-addressing FIFO
Self-archiving data recording
Self-clocking sense amplifier optimized for input signals close
Self-enabling pulse trapping circuit
Self-enabling pulse-trapping circuit
Self-enabling pulse-trapping circuit
Self-protected circuit for non-selected programmable elements du
Self-synchronizing clock source for optical memories
Self-timed address decoder for register file and compare circuit