Self timed bit and read/write pulse stretchers

Details Self timed bit and read/write pulse stretchers Self timed bit and read/write pulse stretchers

2006-02-28

2006-02-28

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S233100, C365S194000, C365S154000, C365S189050

Reexamination Certificate

active

07006403

ABSTRACT:
Bit and write decode/drivers, a random access memory (RAM) including the decode/drivers and an IC with a static RAM (SRAM) including the decode/drivers. The decode/drivers are clocked by a local clock and each produce access pulses wider than corresponding clock pulses. The bit decode/driver produces bit select pulses that are wider than a word select pulse and the write decode/driver produces write pulses that are wider than the bit select pulses for stable self timed RAM write accesses.

REFERENCES:
patent: 4541076 (1985-09-01), Bowers et al.
patent: 5221865 (1993-06-01), Phillips et al.
patent: 5546355 (1996-08-01), Raatz et al.
patent: 5666324 (1997-09-01), Kosugi et al.
patent: 5777935 (1998-07-01), Pantelakis et al.
patent: 5920510 (1999-07-01), Yukutake et al.
patent: 6130846 (2000-10-01), Hori et al.
Mazda, Electronics Engineer's Reference Book, 5th Edition, Butterworths, 1983, p. 30/6.

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