Self-timed address decoder for register file and compare circuit

Details Self-timed address decoder for register file and compare circuit Self-timed address decoder for register file and compare circuit

1998-08-14

2000-06-06

Le, Vu A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523002, G11C 800

Patent

active

060727462

ABSTRACT:
A circuit evaluates a plurality of data inputs, provides for stabilization of the evaluation, and then drives the evaluation from the circuit. The providing of the stabilization is performed by delaying an activation signal, which controls the evaluation circuitry. The activation signal may be either a clock signal or a reset signal. This circuit may be an address decoder that decodes certain ones of the address signals during the evaluation phase, and then drives the evaluation during the second phase.

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Digest of Technical Papers--Solid-State Circuits Conference, 1986 IEEE International, First Edition, Feb. 1986, pp. 260-261.

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