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Clock control circuit with an input stop circuit

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Clock control in sequential circuit for low-power operation...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock control signal and output enable signal generator in...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock device for supporting multiplicity of memory module types

Static information storage and retrieval – Addressing – Sync/clocking
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Clock frequency detector for a synchronous memory device

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Clock frequency detector for a synchronous memory device

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Clock generating circuit ensuring a wide lock-allowing...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generating circuit for use in semiconductor memory device

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Clock generating circuits controlling activation of a delay...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generating circuits that utilize analog pump signals to pr

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Clock generation circuit and semiconductor memory device...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generation circuit having compensation for semiconductor m

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generation circuits

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generation circuits and methods

Static information storage and retrieval – Addressing – Sync/clocking
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Clock generator for semiconductor memory

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Clock generator having a delay locked loop and duty cycle...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock mode determination in a memory system

Static information storage and retrieval – Addressing – Sync/clocking
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Clock phase adjustment method, and integrated circuit and...

Static information storage and retrieval – Addressing – Sync/clocking
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Clock reproduction circuit that can reproduce internal clock sig

Static information storage and retrieval – Addressing – Sync/clocking
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Clock signal from an adjustable oscillator for an integrated cir

Static information storage and retrieval – Addressing – Sync/clocking
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