Clock generating circuit for use in semiconductor memory device

Details Clock generating circuit for use in semiconductor memory device Clock generating circuit for use in semiconductor memory device

1996-06-24

1998-06-16

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

36523001, 3652335, G11C 800

Patent

active

057682135

ABSTRACT:
In a semiconductor memory integrated circuit device, power consumption and clock noise are reduced by providing a plurality of separately controlled internal clock signal generators. All of the internal clock signal generators receive an external clock signal, so as to provide respective internal clock signals that are synchronized with the external clock signal. However, each of the internal clock signal generators is separately controlled depending upon the present operating mode of the memory, so that individual internal clock signals are generated only when required.

REFERENCES:
patent: 4945516 (1990-07-01), Kashiyama
patent: 4953131 (1990-08-01), Purdham et al.
patent: 5335206 (1994-08-01), Kawamoto
patent: 5563843 (1996-10-01), Fackenthal et al.

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