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Self-aligned double-gate MOSFET by selective epitaxy and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned double-sided vertical MIMcap

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
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Self-aligned drain/channel junction in vertical pass...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned dual damascene arrangement for metal interconnectio

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Self-aligned dual damascene arrangement for metal...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
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Self-aligned dual damascene arrangement for metal...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
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Self-aligned dual damascene etch using a polymer

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Self-aligned dual stressed layers for NFET and PFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned dual thickness cobalt silicide layer formation proc

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent

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Self-aligned dual-floating gate memory cell and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned dual-gate transistor device and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned dual-oxide umosfet device and a method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned dynamic threshold CMOS device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned edge control in silicon on insulator

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned eetching process

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
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Self-aligned electrodes contained within the trenches of an...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
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Self-aligned element isolation film structure in a flash...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned emitter and base BJT process and structure

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
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Self-aligned epitaxially grown bipolar transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Self-aligned etch stop for polycrystalline silicon plugs on...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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