Search
Selected: S

Selectively sized spacers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Selectively thin silicon film for creating fully and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Selectively-etched nanochannel electrophoretic and...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Selectivity oxide-to-oxynitride etch process using a...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned barrier process for small pixel virtual phase charg

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned bit-line contact opening and node contact...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned buried plate

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned channel implant, elevated S/D process by gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned channel implant, elevated S/D process by gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned channel implant, elevated S/D process by gate...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned compact bipolar junction transistor layout, and...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Forming base region of specified dopant concentration profile
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned compact bipolar junction transistor layout, and...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Complementary bipolar transistors
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contact in a semiconductor device and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contact pad in a semiconductor device and...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contact plug technology

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contact structure for trench device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contact using spacers on the ILD layer sidewalls

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned contacts

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned damascene gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Self aligned DMOS transistor and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.