Selectively sized spacers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Details

438696, H01L 21336, H01L 21311

Patent

active

06046089&

ABSTRACT:
The formation of selectively sized spacers is disclosed. One embodiment comprises a method including four steps. In the first step, at least one spacer for each of a plurality of gates is formed on a substrate, the plurality of gates including a first gate and at least one remaining gate, and each spacer adjacent to an edge of its corresponding gate. In the second step, a mask is applied to the first gate, including the spacers for the first gate. In the third step, the spacers for the remaining gates are etched. In the fourth step, the mask applied to the first gate, including the spacers for the first gate, is removed.

REFERENCES:
patent: 5017515 (1991-05-01), Gill
patent: 5177570 (1993-01-01), Tanaka
patent: 5371026 (1994-12-01), Hayden et al.
patent: 5424571 (1995-06-01), Liou
patent: 5783475 (1998-07-01), Ramaswami
patent: 5874330 (1999-02-01), Ahn

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