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Strained silicon-on-insulator by anodization of a buried p+...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Strained transistor architecture and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strained transistor integration for CMOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strained ultra-thin SOI transistor formed by replacement gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Strained-channel fin field effect transistor (FET) with a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Strained-channel semiconductor structure and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strained-silicon channel CMOS with sacrificial shallow...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strained-silicon devices with different silicon thicknesses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strained-silicon semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strap with intrinsically conductive barrier

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strapping via for interconnecting integrated circuit structures

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strapping word lines of NAND memory devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Strapping word lines of NAND memory devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress controlled dielectric integrated circuit fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Stress enhanced CMOS circuits and methods for their fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress inducing spacers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress inducing spacers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress liner for integrated circuits

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress relaxation in dielectric before metallization

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Stress transfer in an interlayer dielectric by providing a...

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