LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having junction gate

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Gate-controlled, negative resistance diode device using...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Reexamination Certificate

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Heterogeneous group IV semiconductor substrates, integrated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Heterogeneous group IV semiconductor substrates, integrated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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High voltage depletion FET employing a channel stopping implant

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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High-voltage SOI MOS device structure and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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High-voltage transistor with buried conduction layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Integrated circuit using complementary junction field effect...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Integrated circuit with protected implantation profiles and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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JFET structure and manufacture method for low on-resistance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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JFET structure and manufacture method for low on-resistance...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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JFET structure for integrated circuit and fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Junction leakage monitor for MOSFETs with silicide contacts

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Liner for semiconductor memories and manufacturing method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Low-power multiple-channel fully depleted quantum well CMOSFETs

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Manufacturing method of a junction field effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Memory device with active and passive layers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Method and apparatus on (110) surfaces of silicon structures...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Method and structure for double dose gate in a JFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Method and structure for reducing induced mechanical stresses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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Method and structure for reducing induced mechanical stresses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

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