Gate-controlled, negative resistance diode device using...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Reexamination Certificate

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C438S199000, C438S380000, C438S570000, C438S091000, C257S199000, C257S482000, C257S604000

Reexamination Certificate

active

06855587

ABSTRACT:
A new gate-controlled, negative resistance diode device is achieved. The device comprises, first, a semiconductor layer in a substrate. The semiconductor layer contains an emitter region and a barrier region. The barrier region is in contact with the emitter region and is laterally adjacent to the emitter region. The semiconductor layer contains a collector region. A drift region comprises the semiconductor layer between the barrier region and the collector region. Finally, a gate comprises a conductor layer overlying the drift region, the barrier region, and at least a part of the emitter region with an insulating layer therebetween. A method of manufacture is achieved.

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“Comparison of GIDL in p+−poly PMOS and n+−poly PMOS Devices,” by Lindert et al., IEEE Electron Device Letters, vol. 17, No. 6, Jun. 1996, pp. 285-287.

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