Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-06-10
2004-03-23
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S424000, C438S156000, C257S286000, C257S327000, C257S387000
Reexamination Certificate
active
06709936
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuit structures and, in particular, to a novel MOSFET gate design that includes narrow and short gate cells that are connected both in parallel and in series in order to increase the device current derive, while maintaining the overall device performance characteristics of larger geometry devices, and while minimizing short channel effects (SCE) and narrow channel effects (NCE).
2. Discussion of the Related Art
It has been shown that MOSFET transistors show degraded performance due to enhanced short channel effects (SCE) as the transistors are made shorter while maintaining large channel width. For example, the threshold voltage of an N-channel MOSFET transistor gets smaller as the channel length of the transistor is made shorter. In general, the overall performance characteristics of a MOSFET device become impaired as a result of severe short channel effects if the device is made shorter than that provided by currently available technology.
The channel width of a MOSFET device has a similar effect on the transistor characteristics, but in the opposite sense. That is, the threshold voltage of an N-channel MOSFET transistor becomes larger when the channel width is made narrower.
H. S. Lee, “An Analysis of the Threshold Voltage for Short Channel IGFETs”, Solid State Electronics, 1973, vol. 15, pgs. 1407-1417, teaches that when the MOSFET transistor channel gate is made short as well as narrow, the two threshold voltage shift effects, i.e. SCE and NCE, have a compensating tendency. Also, the threshold voltage of such a short
arrow device can actually improve and may approach that of a larger geometry device.
SUMMARY OF THE INVENTION
The present invention provides a novel MOSFET gate design. The new gate design includes short
arrow gate cells that are connected in parallel and in series in order to increase the device current derive. The overall device performance characteristics would look like those of a larger geometry device, with minimal short channel effects and narrow channel effects.
One embodiment of the present invention provides a narrow high performance MOS device structure that includes a rectangular-shaped semiconductor substrate well region having a first conductivity type. The well region is surrounded by shallow trench isolation (STI). A region of STI dielectric material is also formed at the center of the substrate region. Four substrate diffusion regions, each having a second conductivity type opposite the first conductivity type, are formed in the substrate diffusion region in a respective comer of the substrate well region. The four diffusion regions are spaced-apart such that a substrate channel region is defined between each adjacent pair of substrate diffusion regions. A common conductive gate electrode is formed to have four fingers, each one of the fingers extending over a corresponding substrate channel region. The fingers of the common conductive gate electrode are spaced-apart from the underlying substrate channel regions by dielectric material formed therebetween.
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A.A. Naem et al., Compensation Tendency of Short-Channel and Narrow-Channel Effects in Small-Geometry IGFETs,Electronics Letters, Feb. 4th, 1982, vol. 18, No. 3, pp. 135-136.
H.S. Lee, “An Analysis of the Threshold Voltage for Short-Channel IGFET's,”Solid-State Electronics, 1973, vol. 16, pp. 1407-1417.
Everhart Caridad
Lee Calvin
National Semiconductor Corporation
Stallman & Pollock LLP
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