Nanoscale fet

Details Nanoscale fet Nanoscale fet

2005-07-12

2010-11-23

Smith, Zandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S962000, C977S762000, C977S818000, C977S938000

Reexamination Certificate

active

07838368

ABSTRACT:
A transistor device is formed of a continuous linear nanostructure having a source region, a drain region and a channel region between the source and drain regions. The source (20) and drain (26) regions are formed of nanowire ania the channel region (24) is in the form of a nanotube. An insulated gate (32) is provided adjacent to the channel region (24) for controlling conduction i ni the channel region between the source and drain regions.

REFERENCES:
patent: 6798000 (2004-09-01), Luyken et al.
patent: 7115916 (2006-10-01), Avouris et al.
patent: 7180107 (2007-02-01), Appenzeller et al.
patent: 2002/0014667 (2002-02-01), Shin et al.
patent: 2003/0148562 (2003-08-01), Luyken
patent: 2 382 718 (2003-06-01), None
patent: WO 03/083949 (2003-10-01), None
Controlled growth and electrical properties of heterojunctions of carbon nanotubes and silicon nanowires, Jiangtao Hu, Min Ouyang, Peidong Yang & Charles M. Lieber, Nature 399, 48-51 (May 6, 1999).
“Synthesis of InP Nanotubes” Erik P.A.M. Bakkers and Marcel A. Verheijen, J. Am. Chem. Soc., vol. 125 No. 12, 2003.

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